#
495dd859 |
| 04-Jun-2013 |
Marc Zyngier <marc.zyngier@arm.com> |
KVM: ARM: vgic: abstract MISR decoding
Instead of directly dealing with the GICH_MISR bits, move the code to its own function and use a couple of public flags to represent the actual state.
Acked-b
KVM: ARM: vgic: abstract MISR decoding
Instead of directly dealing with the GICH_MISR bits, move the code to its own function and use a couple of public flags to represent the actual state.
Acked-by: Catalin Marinas <catalin.marinas@arm.com> Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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#
8d6a0313 |
| 04-Jun-2013 |
Marc Zyngier <marc.zyngier@arm.com> |
KVM: ARM: vgic: abstract EISR bitmap access
Move the GICH_EISR access to its own function.
Acked-by: Catalin Marinas <catalin.marinas@arm.com> Reviewed-by: Christoffer Dall <christoffer.dall@linaro
KVM: ARM: vgic: abstract EISR bitmap access
Move the GICH_EISR access to its own function.
Acked-by: Catalin Marinas <catalin.marinas@arm.com> Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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#
69bb2c9f |
| 04-Jun-2013 |
Marc Zyngier <marc.zyngier@arm.com> |
KVM: ARM: vgic: abstract access to the ELRSR bitmap
Move the GICH_ELRSR access to its own functions, and add them to the vgic_ops structure.
Acked-by: Catalin Marinas <catalin.marinas@arm.com> Revi
KVM: ARM: vgic: abstract access to the ELRSR bitmap
Move the GICH_ELRSR access to its own functions, and add them to the vgic_ops structure.
Acked-by: Catalin Marinas <catalin.marinas@arm.com> Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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#
8d5c6b06 |
| 03-Jun-2013 |
Marc Zyngier <marc.zyngier@arm.com> |
KVM: ARM: vgic: introduce vgic_ops and LR manipulation primitives
In order to split the various register manipulation from the main vgic code, introduce a vgic_ops structure, and start by abstractin
KVM: ARM: vgic: introduce vgic_ops and LR manipulation primitives
In order to split the various register manipulation from the main vgic code, introduce a vgic_ops structure, and start by abstracting the LR manipulation code with a couple of accessors.
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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Revision tags: v3.10-rc4 |
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#
eede821d |
| 30-May-2013 |
Marc Zyngier <marc.zyngier@arm.com> |
KVM: arm/arm64: vgic: move GICv2 registers to their own structure
In order to make way for the GICv3 registers, move the v2-specific registers to their own structure.
Acked-by: Catalin Marinas <cat
KVM: arm/arm64: vgic: move GICv2 registers to their own structure
In order to make way for the GICv3 registers, move the v2-specific registers to their own structure.
Acked-by: Catalin Marinas <catalin.marinas@arm.com> Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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#
6d32c850 |
| 31-Mar-2014 |
Paul Moore <pmoore@redhat.com> |
Merge tag 'v3.14' into next
Linux 3.14
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#
6cbde825 |
| 06-Mar-2014 |
Marc Zyngier <marc.zyngier@arm.com> |
ARM: KVM: fix non-VGIC compilation
Add a stub for kvm_vgic_addr when compiling without CONFIG_KVM_ARM_VGIC. The usefulness of this configurarion is extremely doubtful, but let's fix it anyway (until
ARM: KVM: fix non-VGIC compilation
Add a stub for kvm_vgic_addr when compiling without CONFIG_KVM_ARM_VGIC. The usefulness of this configurarion is extremely doubtful, but let's fix it anyway (until we decide that we'll always support a VGIC).
Reported-by: Michele Paolino <m.paolino@virtualopensystems.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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#
ce01e4e8 |
| 23-Sep-2013 |
Christoffer Dall <christoffer.dall@linaro.org> |
KVM: arm-vgic: Set base addr through device API
Support setting the distributor and cpu interface base addresses in the VM physical address space through the KVM_{SET,GET}_DEVICE_ATTR API in additio
KVM: arm-vgic: Set base addr through device API
Support setting the distributor and cpu interface base addresses in the VM physical address space through the KVM_{SET,GET}_DEVICE_ATTR API in addition to the ARM specific API.
This has the added benefit of being able to share more code in user space and do things in a uniform manner.
Also deprecate the older API at the same time, but backwards compatibility will be maintained.
Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
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#
9b2d2e0d |
| 29-Aug-2013 |
Christoffer Dall <christoffer.dall@linaro.org> |
ARM: KVM: vgic: Bump VGIC_NR_IRQS to 256
The Versatile Express TC2 board, which we use as our main emulated platform in QEMU, defines 160+32 == 192 interrupts, so limiting the number of interrupts t
ARM: KVM: vgic: Bump VGIC_NR_IRQS to 256
The Versatile Express TC2 board, which we use as our main emulated platform in QEMU, defines 160+32 == 192 interrupts, so limiting the number of interrupts to 128 is not quite going to cut it for real board emulation.
Note that this didn't use to be a problem because QEMU was buggy and only defined 128 interrupts until recently.
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Gleb Natapov <gleb@redhat.com>
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Revision tags: v3.10-rc3, v3.10-rc2 |
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#
7275acdf |
| 14-May-2013 |
Marc Zyngier <marc.zyngier@arm.com> |
ARM: KVM: move GIC/timer code to a common location
As KVM/arm64 is looming on the horizon, it makes sense to move some of the common code to a single location in order to reduce duplication.
The co
ARM: KVM: move GIC/timer code to a common location
As KVM/arm64 is looming on the horizon, it makes sense to move some of the common code to a single location in order to reduce duplication.
The code could live anywhere. Actually, most of KVM is already built with a bunch of ugly ../../.. hacks in the various Makefiles, so we're not exactly talking about style here. But maybe it is time to start moving into a less ugly direction.
The include files must be in a "public" location, as they are accessed from non-KVM files (arch/arm/kernel/asm-offsets.c).
For this purpose, introduce two new locations: - virt/kvm/arm/ : x86 and ia64 already share the ioapic code in virt/kvm, so this could be seen as a (very ugly) precedent. - include/kvm/ : there is already an include/xen, and while the intent is slightly different, this seems as good a location as any
Eventually, we should probably have independant Makefiles at every levels (just like everywhere else in the kernel), but this is just the first step.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Gleb Natapov <gleb@redhat.com>
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Revision tags: v3.10-rc1, v3.9, v3.9-rc8, v3.9-rc7, v3.9-rc6, v3.9-rc5, v3.9-rc4, v3.9-rc3, v3.9-rc2, v3.9-rc1, v3.8, v3.8-rc7, v3.8-rc6, v3.8-rc5, v3.8-rc4, v3.8-rc3, v3.8-rc2, v3.8-rc1, v3.7, v3.7-rc8, v3.7-rc7, v3.7-rc6, v3.7-rc5, v3.7-rc4, v3.7-rc3, v3.7-rc2 |
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#
629dc446 |
| 15-Oct-2012 |
Marc Zyngier <marc.zyngier@arm.com> |
ARM: KVM: remove superfluous include from kvm_vgic.h
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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#
01ac5e34 |
| 22-Jan-2013 |
Marc Zyngier <marc.zyngier@arm.com> |
ARM: KVM: VGIC initialisation code
Add the init code for the hypervisor, the virtual machine, and the virtual CPUs.
An interrupt handler is also wired to allow the VGIC maintenance interrupts, used
ARM: KVM: VGIC initialisation code
Add the init code for the hypervisor, the virtual machine, and the virtual CPUs.
An interrupt handler is also wired to allow the VGIC maintenance interrupts, used to deal with level triggered interrupts and LR underflows.
A CPU hotplug notifier is registered to disable/enable the interrupt as requested.
Reviewed-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Christoffer Dall <c.dall@virtualopensystems.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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#
5863c2ce |
| 22-Jan-2013 |
Marc Zyngier <marc.zyngier@arm.com> |
ARM: KVM: VGIC interrupt injection
Plug the interrupt injection code. Interrupts can now be generated from user space.
Reviewed-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Christoffer Dall
ARM: KVM: VGIC interrupt injection
Plug the interrupt injection code. Interrupts can now be generated from user space.
Reviewed-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Christoffer Dall <c.dall@virtualopensystems.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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#
9d949dce |
| 22-Jan-2013 |
Marc Zyngier <marc.zyngier@arm.com> |
ARM: KVM: VGIC virtual CPU interface management
Add VGIC virtual CPU interface code, picking pending interrupts from the distributor and stashing them in the VGIC control interface list registers.
ARM: KVM: VGIC virtual CPU interface management
Add VGIC virtual CPU interface code, picking pending interrupts from the distributor and stashing them in the VGIC control interface list registers.
Reviewed-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Christoffer Dall <c.dall@virtualopensystems.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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#
b47ef92a |
| 22-Jan-2013 |
Marc Zyngier <marc.zyngier@arm.com> |
ARM: KVM: VGIC distributor handling
Add the GIC distributor emulation code. A number of the GIC features are simply ignored as they are not required to boot a Linux guest.
Reviewed-by: Will Deacon
ARM: KVM: VGIC distributor handling
Add the GIC distributor emulation code. A number of the GIC features are simply ignored as they are not required to boot a Linux guest.
Reviewed-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Christoffer Dall <c.dall@virtualopensystems.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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#
330690cd |
| 22-Jan-2013 |
Christoffer Dall <c.dall@virtualopensystems.com> |
ARM: KVM: VGIC accept vcpu and dist base addresses from user space
User space defines the model to emulate to a guest and should therefore decide which addresses are used for both the virtual CPU in
ARM: KVM: VGIC accept vcpu and dist base addresses from user space
User space defines the model to emulate to a guest and should therefore decide which addresses are used for both the virtual CPU interface directly mapped in the guest physical address space and for the emulated distributor interface, which is mapped in software by the in-kernel VGIC support.
Reviewed-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Christoffer Dall <c.dall@virtualopensystems.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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#
1a89dd91 |
| 22-Jan-2013 |
Marc Zyngier <marc.zyngier@arm.com> |
ARM: KVM: Initial VGIC infrastructure code
Wire the basic framework code for VGIC support and the initial in-kernel MMIO support code for the VGIC, used for the distributor emulation.
Reviewed-by:
ARM: KVM: Initial VGIC infrastructure code
Wire the basic framework code for VGIC support and the initial in-kernel MMIO support code for the VGIC, used for the distributor emulation.
Reviewed-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Christoffer Dall <c.dall@virtualopensystems.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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