History log of /linux/drivers/mtd/maps/physmap-ixp4xx.c (Results 51 – 54 of 54)
Revision (<<< Hide revision tags) (Show revision tags >>>) Date Author Comments
Revision tags: v5.5-rc1
# 942e6f8a 05-Dec-2019 Olof Johansson <olof@lixom.net>

Merge mainline/master into arm/fixes

This brings in the mainline tree right after armsoc contents was merged
this release cycle, so that we can re-run savedefconfig, etc.

Signed-off-by: Olof Johans

Merge mainline/master into arm/fixes

This brings in the mainline tree right after armsoc contents was merged
this release cycle, so that we can re-run savedefconfig, etc.

Signed-off-by: Olof Johansson <olof@lixom.net>

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# 2ea352d5 26-Nov-2019 Arnaldo Carvalho de Melo <acme@redhat.com>

Merge remote-tracking branch 'torvalds/master' into perf/core

To pick up BPF changes we'll need.

Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>


# 1b88176b 25-Nov-2019 Linus Torvalds <torvalds@linux-foundation.org>

Merge tag 'mtd/for-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux

Pull MTD updates from Miquel Raynal:
"MTD core:
- drop inactive maintainers, update the repositories and add IR

Merge tag 'mtd/for-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux

Pull MTD updates from Miquel Raynal:
"MTD core:
- drop inactive maintainers, update the repositories and add IRC
channel
- debugfs functions improvements
- initialize more structure parameters
- misc fixes reported by robots

MTD devices:
- spear_smi: Fixed Write Burst mode
- new Intel IXP4xx flash probing hook

Raw NAND core:
- useless extra checks dropped
- update the detection of the bad block markers position

Raw NAND controller drivers:
- Cadence: new driver
- Brcmnand: support for flash-dma v0 + fixes
- Denali: drop support for the legacy controller/chip DT representation
- superfluous dev_err() calls removed

SPI NOR core changes:
- introduce 'struct spi_nor_controller_ops'
- clean the Register Operations methods
- use dev_dbg insted of dev_err for low level info
- fix retlen handling in sst_write()
- fix silent truncations in spi_nor_read and spi_nor_read_raw()
- fix the clearing of QE bit on lock()/unlock()
- rework the disabling of the block write protection
- rework the Quad Enable methods
- make sure nor->spimem and nor->controller_ops are mutually exclusive
- set default Quad Enable method for ISSI flashes
- add support for few flashes

SPI NOR controller drivers changes:
- intel-spi:
- support chips without software sequencer
- add support for Intel Cannon Lake and Intel Comet Lake-H flashes

CFI core changes:
- code cleanups related useless initializers and coding style issues
- fix for a possible double free problem in cfi_cmdset_0002
- improved HyperFlash error reporting and handling in cfi_cmdset_0002 core"

* tag 'mtd/for-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: (73 commits)
mtd: devices: fix mchp23k256 read and write
mtd: no need to check return value of debugfs_create functions
mtd: spi-nor: Set default Quad Enable method for ISSI flashes
mtd: spi-nor: Add support for is25wp256
mtd: spi-nor: Add support for w25q256jw
mtd: spi-nor: Move condition to avoid a NULL check
mtd: spi-nor: Make sure nor->spimem and nor->controller_ops are mutually exclusive
mtd: spi-nor: Rename Quad Enable methods
mtd: spi-nor: Merge spansion Quad Enable methods
mtd: spi-nor: Rename CR_QUAD_EN_SPAN to SR2_QUAD_EN_BIT1
mtd: spi-nor: Extend the SR Read Back test
mtd: spi-nor: Rework the disabling of block write protection
mtd: spi-nor: Fix clearing of QE bit on lock()/unlock()
mtd: cfi_cmdset_0002: fix delayed error detection on HyperFlash
mtd: cfi_cmdset_0002: only check errors when ready in cfi_check_err_status()
mtd: cfi_cmdset_0002: don't free cfi->cfiq in error path of cfi_amdstd_setup()
mtd: cfi_cmdset_*: kill useless 'ret' variable initializers
mtd: cfi_util: use DIV_ROUND_UP() in cfi_udelay()
mtd: spi-nor: Print debug message when the read back test fails
mtd: spi-nor: Check all the bits written, not just the BP ones
...

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Revision tags: v5.4, v5.4-rc8, v5.4-rc7, v5.4-rc6, v5.4-rc5
# 2aba2f2a 20-Oct-2019 Linus Walleij <linus.walleij@linaro.org>

mtd: physmap_of: add a hook for Intel IXP4xx flash probing

In order to support device tree probing of IXP4xx NOR flash
chips, a certain big-endian or mixed-endian memory access
pattern need to be us

mtd: physmap_of: add a hook for Intel IXP4xx flash probing

In order to support device tree probing of IXP4xx NOR flash
chips, a certain big-endian or mixed-endian memory access
pattern need to be used.

I have opted to use the pattern set by previous plug-ins
to physmap for Gemini and Versatile, just override some
functions and reuse most of the physmap core code as it
is to minimize maintenance.

Parts of drivers/mtd/ixp4xx.c are copied into this file.

After we have IXP4xx converted fully to device tree, the
drivers/mtd/ixp4xx.c file will be deleted and this will
be the only access pattern to the IXP4xx flash.

I did not keep the quirk in the flash write function
after probe, where the old code for a while checks for
access to odd addresses, fails and assigns a "faster"
write function once it has convinced probe to only use
2-byte accesses. As we mandate that this device should
be using bank-width = <2> this should not be a problem
unless misconfigured.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>

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