Merge branch 'main' into zstd-next

Merge drm/drm-fixes into drm-misc-fixes

Backmerging to get v6.1-rc1.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>

ASoC: jz4752b: Capture fixes

Merge series from Siarhei Volkau <lis8215@gmail.com>:

The patchset fixes:
- Line In path stays powered off during capturing or
bypass to mixer.
- incorrectly repre

ASoC: jz4752b: Capture fixes

Merge series from Siarhei Volkau <lis8215@gmail.com>:

The patchset fixes:
- Line In path stays powered off during capturing or
bypass to mixer.
- incorrectly represented dB values in alsamixer, et al.
- incorrect represented Capture input selector in alsamixer
in Playback tab.
- wrong control selected as Capture Master

show more ...

Merge drm/drm-next into drm-misc-next

Let's kick-off this release cycle.

Signed-off-by: Maxime Ripard <maxime@cerno.tech>

Merge tag 'v6.1-rc1' into next

Merge with mainline to bring in the latest changes to twl4030 driver.

Merge branch 'master' into mm-hotfixes-stable

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
"We have some late breaking reports that a patch series to rework clk
rate

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
"We have some late breaking reports that a patch series to rework clk
rate range support broke boot on some devices, so I've left that
branch out of this. Hopefully we can get to that next week, or punt on
it and let it bake another cycle. That means we don't really have any
changes to the core framework this time around besides a few typo
fixes. Instead this is all clk driver updates and fixes.

The usual suspects are here (again), with Qualcomm dominating the
diffstat. We look to have gained support for quite a few new Qualcomm
SoCs and Dmitry worked on updating many of the existing Qualcomm
drivers to use clk_parent_data. After that we have MediaTek drivers
getting some much needed updates, in particular to support GPU DVFS.
There are also quite a few Samsung clk driver patches, but that's
mostly because there was a maintainer change and so last release we
missed some of those patches.

Overall things look normal, but I'm slowly reviewing core framework
code nowadays and that shows given the rate range patches had to be
yanked last minute. Let's hope this situation changes soon.

New Drivers:
- Support for Renesas VersaClock7 clock generator family
- Add Spreadtrum UMS512 SoC clk support
- New clock drivers for MediaTek Helio X10 MT6795
- Display clks for Qualcomm SM6115, SM8450
- GPU clks for Qualcomm SC8280XP
- Qualcomm MSM8909 and SM6375 global and SMD RPM clk drivers

Deleted Drivers:
- Remove DaVinci DM644x and DM646x clk driver support

Updates:
- Convert Baikal-T1 CCU driver to platform driver
- Split reset support out of primary Baikal-T1 CCU driver
- Add some missing clks required for RPiVid Video Decoder on
RaspberryPi
- Mark PLLC critical on bcm2835
- More devm helpers for fixed rate registration
- Various PXA168 clk driver fixes
- Add resets for MediaTek MT8195 PCIe and USB
- Miscellaneous of_node_put() fixes
- Nuke dt-bindings/clk path (again) by moving headers to
dt-bindings/clock
- Convert gpio-clk-gate binding to YAML
- Various fixes to AMD/Xilinx Zynqmp clk driver
- Graduate AMD/Xilinx "clocking wizard" driver from staging
- Add missing DPI1_HDMI clock in MT8195 VDOSYS1
- Clock driver changes to support GPU DVFS on MT8183, MT8192, MT8195
- Fix GPU clock topology on MT8195
- Propogate rate changes from GPU clock gate up the tree
- Clock mux notifiers for GPU-related PLLs
- Conversion of more "simple" drivers to mtk_clk_simple_probe()
- Hook up mtk_clk_simple_remove() for "simple" MT8192 clock drivers
- Fixes to previous |struct clk| to |struct clk_hw| conversion on
MediaTek
- Shrink MT8192 clock driver by deduplicating clock parent lists
- Change order between 'sim_enet_root_clk' and 'enet_qos_root_clk'
clocks for i.MX8MP
- Drop unnecessary newline in i.MX8MM dt-bindings
- Add more MU1 and SAI clocks dt-bindings Ids
- Introduce slice busy bit check for i.MX93 composite clock
- Introduce white list bit check for i.MX93 composite clock
- Add new i.MX93 clock gate
- Add MU1 and MU2 clocks to i.MX93 clock provider
- Add SAI IPG clocks to i.MX93 clock provider
- add generic clocks for U(S)ART available on SAMA5D2 SoCs
- reset controller support for Polarfire clocks
- .round_rate and .set rate support for clk-mpfs
- code cleanup for clk-mpfs
- PLL support for PolarFire SoC's Clock Conditioning Circuitry
- Add watchdog, I2C, pin control/GPIO, and Ethernet clocks on R-Car
V4H
- Add SDHI, Timer (CMT/TMU), and SPI (MSIOF) clocks on R-Car S4-8
- Add I2C clocks and resets on RZ/V2M
- Document clock support for the RZ/Five SoC
- mux-variant clock using the table variant to select parents
- clock controller for the rv1126 soc
- conversion of rk3128 to yaml and relicensing of the yaml bindings
to gpl2+MIT (following dt-binding guildelines)
- Exynos7885: add FSYS, TREX and MFC clock controllers
- Exynos850: add IS and AUD (audio) clock controllers with bindings
- ExynosAutov9: add FSYS clock controllers with bindings
- ExynosAutov9: correct clock IDs in bindings of Peric 0 and 1 clock
controllers, due to duplicated entries. This is an acceptable ABI
break: recently developed/added platform so without legacies, acked
by known users/developers
- ExynosAutov9: add few missing Peric 0/1 gates
- ExynosAutov9: correct register offsets of few Peric 0/1 clocks
- Minor code improvements (use of_device_get_match_data() helper,
code style)
- Add Krzysztof Kozlowski as co-maintainer of Samsung SoC clocks, as
he already maintainers that architecture/platform
- Keep Qualcomm GDSCs enabled when PWRSTS_RET flag is there, solving
retention issues during suspend of USB on Qualcomm sc7180/sc7280
and SC8280XP
- Qualcomm SM6115 and QCM2260 are moved to reuse PLL configuration
- Qualcomm SDM660 SDCC1 moved to floor clk ops
- Support for the APCS PLLs for Qualcomm IPQ8064, IPQ8074 and IPQ6018
was added/fixed
- The Qualcomm MSM8996 CPU clocks are updated with support for ACD
- Support for Qualcomm SDM670 GCC and RPMh clks was added
- Transition to parent_data, parent_hws and use of ARRAY_SIZE() for
num_parents was done for many Qualcomm SoCs
- Support for per-reset defined delay on Qualcomm was introduced"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (283 commits)
clk: qcom: gcc-sm6375: Ensure unsigned long type
clk: qcom: gcc-sm6375: Remove unused variables
clk: qcom: kpss-xcc: convert to parent data API
clk: introduce (devm_)hw_register_mux_parent_data_table API
clk: allow building lan966x as a module
clk: clk-xgene: simplify if-if to if-else
clk: ast2600: BCLK comes from EPLL
clk: clocking-wizard: Depend on HAS_IOMEM
clk: clocking-wizard: Use dev_err_probe() helper
clk: nxp: fix typo in comment
clk: pxa: add a check for the return value of kzalloc()
clk: vc5: Add support for IDT/Renesas VersaClock 5P49V6975
dt-bindings: clock: vc5: Add 5P49V6975
clk: mvebu: armada-37xx-tbg: Remove the unneeded result variable
clk: ti: dra7-atl: Fix reference leak in of_dra7_atl_clk_probe
clk: Renesas versaclock7 ccf device driver
dt-bindings: Renesas versaclock7 device tree bindings
clk: ti: Balance of_node_get() calls for of_find_node_by_name()
clk: imx: scu: fix memleak on platform_device_add() fails
clk: vc5: Use regmap_{set,clear}_bits() where appropriate
...

show more ...

Merge branches 'clk-samsung', 'clk-mtk', 'clk-rm', 'clk-ast' and 'clk-qcom' into clk-next

- Add resets for MediaTek MT8195 PCIe and USB
- Remove DaVinci DM644x and DM646x clk driver support

* clk

Merge branches 'clk-samsung', 'clk-mtk', 'clk-rm', 'clk-ast' and 'clk-qcom' into clk-next

- Add resets for MediaTek MT8195 PCIe and USB
- Remove DaVinci DM644x and DM646x clk driver support

* clk-samsung:
clk: samsung: MAINTAINERS: add Krzysztof Kozlowski
clk: samsung: exynos850: Implement CMU_MFCMSCL domain
clk: samsung: exynos850: Implement CMU_IS domain
clk: samsung: exynos850: Implement CMU_AUD domain
clk: samsung: exynos850: Style fixes
clk: samsung: exynosautov9: add fsys1 clock support
clk: samsung: exynosautov9: add fsys0 clock support
clk: samsung: exynosautov9: correct register offsets of peric0/c1
clk: samsung: exynosautov9: add missing gate clks for peric0/c1
dt-bindings: clock: exynos850: Add Exynos850 CMU_MFCMSCL
dt-bindings: clock: exynos850: Add Exynos850 CMU_IS
dt-bindings: clock: exynos850: Add Exynos850 CMU_AUD
dt-bindings: clock: exynosautov9: add schema for cmu_fsys0/1
dt-bindings: clock: exynosautov9: add fsys1 clock definitions
dt-bindings: clock: exynosautov9: add fys0 clock definitions
clk: samsung: exynos7885: Add TREX clocks
clk: samsung: exynos7885: Implement CMU_FSYS domain
dt-bindings: clock: exynosautov9: correct clock numbering of peric0/c1
clk: samsung: exynos-clkout: Use of_device_get_match_data()

* clk-mtk: (42 commits)
clk: mediatek: add driver for MT8365 SoC
clk: mediatek: Export required common code symbols
clk: mediatek: Provide mtk_devm_alloc_clk_data
dt-bindings: clock: mediatek: add bindings for MT8365 SoC
clk: mediatek: mt8192: deduplicate parent clock lists
clk: mediatek: Migrate remaining clk_unregister_*() to clk_hw_unregister_*()
clk: mediatek: fix unregister function in mtk_clk_register_dividers cleanup
clk: mediatek: clk-mt8192: Add clock mux notifier for mfg_pll_sel
clk: mediatek: clk-mt8192-mfg: Propagate rate changes to parent
clk: mediatek: clk-mt8195-topckgen: Drop univplls from mfg mux parents
clk: mediatek: clk-mt8195-topckgen: Add GPU clock mux notifier
clk: mediatek: clk-mt8195-topckgen: Register mfg_ck_fast_ref as generic mux
clk: mediatek: clk-mt8195-mfg: Reparent mfg_bg3d and propagate rate changes
clk: mediatek: mt8183: Add clk mux notifier for MFG mux
clk: mediatek: mux: add clk notifier functions
clk: mediatek: mt8183: mfgcfg: Propagate rate changes to parent
clk: mediatek: Use mtk_clk_register_gates_with_dev in simple probe
clk: mediatek: gate: Export mtk_clk_register_gates_with_dev
clk: mediatek: add VDOSYS1 clock
dt-bindings: clk: mediatek: Add MT8195 DPI clocks
...

* clk-rm:
clk: davinci: remove PLL and PSC clocks for DaVinci DM644x and DM646x

* clk-ast:
clk: ast2600: BCLK comes from EPLL

* clk-qcom: (97 commits)
clk: qcom: gcc-sm6375: Ensure unsigned long type
clk: qcom: gcc-sm6375: Remove unused variables
clk: qcom: kpss-xcc: convert to parent data API
clk: introduce (devm_)hw_register_mux_parent_data_table API
clk: qcom: gcc-msm8939: use ARRAY_SIZE instead of specifying num_parents
clk: qcom: gcc-msm8939: use parent_hws where possible
dt-bindings: clock: move qcom,gcc-msm8939 to qcom,gcc-msm8916.yaml
clk: qcom: gcc-sm6350: Update the .pwrsts for usb gdscs
clk: qcom: gcc-sc8280xp: use retention for USB power domains
clk: qcom: gdsc: add missing error handling
dt-bindings: clocks: qcom,gcc-sc8280xp: Fix typos
clk: qcom: Add global clock controller driver for SM6375
dt-bindings: clock: add SM6375 QCOM global clock bindings
clk: qcom: alpha: Add support for programming the PLL_FSM_LEGACY_MODE bit
clk: qcom: gcc-sc7280: Update the .pwrsts for usb gdscs
clk: qcom: gcc-sc7180: Update the .pwrsts for usb gdsc
clk: qcom: gdsc: Fix the handling of PWRSTS_RET support
clk: qcom: Add SC8280XP GPU clock controller
dt-bindings: clock: Add Qualcomm SC8280XP GPU binding
clk: qcom: smd: Add SM6375 clocks
...

show more ...

Merge tag 'mtk-clk-for-6.1' of https://git.kernel.org/pub/scm/linux/kernel/git/wens/linux into clk-mtk

Pull MediaTek clk driver updates from Chen-Yu Tsai:

A lot of clean up work, as well as new dri

Merge tag 'mtk-clk-for-6.1' of https://git.kernel.org/pub/scm/linux/kernel/git/wens/linux into clk-mtk

Pull MediaTek clk driver updates from Chen-Yu Tsai:

A lot of clean up work, as well as new drivers and new functions

- New clock drivers for MediaTek Helio X10 MT6795
- Add missing DPI1_HDMI clock in MT8195 VDOSYS1
- Clock driver changes to support GPU DVFS on MT8183, MT8192, MT8195
- Fix GPU clock topology on MT8195
- Propogate rate changes from GPU clock gate up the tree
- Clock mux notifiers for GPU-related PLLs
- Conversion of more "simple" drivers to mtk_clk_simple_probe()
- Hook up mtk_clk_simple_remove() for "simple" MT8192 clock drivers
- Fixes to previous |struct clk| to |struct clk_hw| conversion
- Shrink MT8192 clock driver by deduplicating clock parent lists

* tag 'mtk-clk-for-6.1' of https://git.kernel.org/pub/scm/linux/kernel/git/wens/linux: (31 commits)
clk: mediatek: mt8192: deduplicate parent clock lists
clk: mediatek: Migrate remaining clk_unregister_*() to clk_hw_unregister_*()
clk: mediatek: fix unregister function in mtk_clk_register_dividers cleanup
clk: mediatek: clk-mt8192: Add clock mux notifier for mfg_pll_sel
clk: mediatek: clk-mt8192-mfg: Propagate rate changes to parent
clk: mediatek: clk-mt8195-topckgen: Drop univplls from mfg mux parents
clk: mediatek: clk-mt8195-topckgen: Add GPU clock mux notifier
clk: mediatek: clk-mt8195-topckgen: Register mfg_ck_fast_ref as generic mux
clk: mediatek: clk-mt8195-mfg: Reparent mfg_bg3d and propagate rate changes
clk: mediatek: mt8183: Add clk mux notifier for MFG mux
clk: mediatek: mux: add clk notifier functions
clk: mediatek: mt8183: mfgcfg: Propagate rate changes to parent
clk: mediatek: Use mtk_clk_register_gates_with_dev in simple probe
clk: mediatek: gate: Export mtk_clk_register_gates_with_dev
clk: mediatek: add VDOSYS1 clock
dt-bindings: clk: mediatek: Add MT8195 DPI clocks
clk: mediatek: mt8192: add mtk_clk_simple_remove
clk: mediatek: mt8183: use mtk_clk_simple_probe to simplify driver
clk: mediatek: mt6797: use mtk_clk_simple_probe to simplify driver
clk: mediatek: mt6779: use mtk_clk_simple_probe to simplify driver
...

show more ...

clk: mediatek: mt8192: add mtk_clk_simple_remove

mt8192 is already using mtk_clk_simple_probe,
but not mtk_clk_simple_remove.

Let's add mtk_clk_simple_remove for mt8192.

Signed-off-by: Miles Chen

clk: mediatek: mt8192: add mtk_clk_simple_remove

mt8192 is already using mtk_clk_simple_probe,
but not mtk_clk_simple_remove.

Let's add mtk_clk_simple_remove for mt8192.

Signed-off-by: Miles Chen <miles.chen@mediatek.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Tested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220922091841.4099-8-miles.chen@mediatek.com
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>

show more ...

Merge branch 'next' into for-linus

Prepare input updates for 5.17 merge window.

Merge branch 'reset/of-get-optional-exclusive' of git://git.pengutronix.de/pza/linux into timers/drivers/next

"Add optional variant of of_reset_control_get_exclusive(). If the
requested reset is not

Merge branch 'reset/of-get-optional-exclusive' of git://git.pengutronix.de/pza/linux into timers/drivers/next

"Add optional variant of of_reset_control_get_exclusive(). If the
requested reset is not specified in the device tree, this function
returns NULL instead of an error."

This dependency is needed for the Generic Timer Module (a.k.a OSTM)
support for RZ/G2L.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>

show more ...

Merge tag 'v5.15' into next

Sync up with the mainline to get the latest APIs and DT bindings.

Merge branch 'for-5.16-vsprintf-pgp' into for-linus

Merge drm/drm-next into drm-intel-next

Catch-up on 5.15-rc1 and sync with drm-intel-gt-next
to prepare the PXP topic branch.

Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

Merge drm/drm-next into drm-intel-gt-next

Close the divergence which has caused patches not to apply and
have a solid baseline for the PXP patches that Rodrigo will send
a topic branch PR for.

Sign

Merge drm/drm-next into drm-intel-gt-next

Close the divergence which has caused patches not to apply and
have a solid baseline for the PXP patches that Rodrigo will send
a topic branch PR for.

Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>

show more ...

Merge drm/drm-next into drm-misc-next

Kickstart new drm-misc-next cycle.

Signed-off-by: Maxime Ripard <maxime@cerno.tech>

Merge branch 'pruss-fix' into fixes

Merge in a fix for pruss reset issue caused by enabling pruss for am335x.

Merge tag 'v5.15-rc2' into spi-5.15

Linux 5.15-rc2

Merge branch 'linus' into smp/urgent

Ensure that all usage sites of get/put_online_cpus() except for the
struggler in drivers/thermal are gone. So the last user and the deprecated
inlines can be rem

Merge branch 'linus' into smp/urgent

Ensure that all usage sites of get/put_online_cpus() except for the
struggler in drivers/thermal are gone. So the last user and the deprecated
inlines can be removed.

show more ...

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
"Nothing changed in the clk framework core this time around. We did get
so

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
"Nothing changed in the clk framework core this time around. We did get
some updates to the basic clk types to use determine_rate for the
divider type and add a power of two fractional divider flag though.

Otherwise, this is a collection of clk driver updates. More than half
the diffstat is in the Qualcomm clk driver where we add a bunch of
data to describe clks on various SoCs and fix bugs. The other big new
thing in here is the Mediatek MT8192 clk driver. That's been under
review for a while and it's nice to see that it's finally upstream.

Beyond that it's the usual set of minor fixes and tweaks to clk
drivers. There are some non-clk driver bits in here which have all
been acked by the respective maintainers.

New Drivers:
- Support video, gpu, display clks on qcom sc7280 SoCs
- GCC clks on qcom MSM8953, SM4250/6115, and SM6350 SoCs
- Multimedia clks (MMCC) on qcom MSM8994/MSM8992
- RPMh clks on qcom SM6350 SoCs
- Support for Mediatek MT8192 SoCs
- Add display (DU and DSI) clocks on Renesas R-Car V3U
- Add I2C, DMAC, USB, sound (SSIF-2), GPIO, CANFD, and ADC clocks and
resets on Renesas RZ/G2L

Updates:
- Support the SD/OE pin on IDT VersaClock 5 and 6 clock generators
- Add power of two flag to fractional divider clk type
- Migrate some clk drivers to clk_divider_ops.determine_rate
- Migrate to clk_parent_data in gcc-sdm660
- Fix CLKOUT clocks on i.MX8MM and i.MX8MN by using imx_clk_hw_mux2
- Switch from .round_rate to .determine_rate in clk-divider-gate
- Fix clock tree update for TF-A controlled clocks for all i.MX8M
- Add missing M7 core clock for i.MX8MN
- YAML conversion of rk3399 clock controller binding
- Removal of GRF dependency for the rk3328/rk3036 pll types
- Drop CLK_IS_CRITICAL flag from Tegra fuse clk
- Make CLK_R9A06G032 Kconfig symbol invisible
- Convert various DT bindings to YAML"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (128 commits)
dt-bindings: clock: samsung: fix header path in example
clk: tegra: fix old-style declaration
clk: qcom: Add SM6350 GCC driver
MAINTAINERS: clock: include S3C and S5P in Samsung SoC clock entry
dt-bindings: clock: samsung: convert S5Pv210 AudSS to dtschema
dt-bindings: clock: samsung: convert Exynos AudSS to dtschema
dt-bindings: clock: samsung: convert Exynos4 to dtschema
dt-bindings: clock: samsung: convert Exynos3250 to dtschema
dt-bindings: clock: samsung: convert Exynos542x to dtschema
dt-bindings: clock: samsung: add bindings for Exynos external clock
dt-bindings: clock: samsung: convert Exynos5250 to dtschema
clk: vc5: Add properties for configuring SD/OE behavior
clk: vc5: Use dev_err_probe
dt-bindings: clk: vc5: Add properties for configuring the SD/OE pin
dt-bindings: clock: brcm,iproc-clocks: fix armpll properties
clk: zynqmp: Fix kernel-doc format
clk: at91: clk-generated: Limit the requested rate to our range
clk: ralink: avoid to set 'CLK_IS_CRITICAL' flag for gates
clk: zynqmp: Fix a memory leak
clk: zynqmp: Check the return type
...

show more ...

Merge branches 'clk-qcom', 'clk-socfpga', 'clk-mediatek', 'clk-lmk' and 'clk-x86' into clk-next

- Support video, gpu, display clks on qcom sc7280 SoCs
- GCC clks on qcom MSM8953, SM4250/6115, and

Merge branches 'clk-qcom', 'clk-socfpga', 'clk-mediatek', 'clk-lmk' and 'clk-x86' into clk-next

- Support video, gpu, display clks on qcom sc7280 SoCs
- GCC clks on qcom MSM8953, SM4250/6115, and SM6350 SoCs
- Multimedia clks (MMCC) on qcom MSM8994/MSM8992
- Migrate to clk_parent_data in gcc-sdm660
- RPMh clks on qcom SM6350 SoCs
- Support for Mediatek MT8192 SoCs

* clk-qcom: (38 commits)
clk: qcom: Add SM6350 GCC driver
dt-bindings: clock: Add SM6350 GCC clock bindings
clk: qcom: rpmh: Add support for RPMH clocks on SM6350
dt-bindings: clock: Add RPMHCC bindings for SM6350
clk: qcom: adjust selects for SM_VIDEOCC_8150 and SM_VIDEOCC_8250
clk: qcom: Add Global Clock controller (GCC) driver for SM6115
dt-bindings: clk: qcom: gcc-sm6115: Document SM6115 GCC
clk: qcom: mmcc-msm8994: Add MSM8992 support
clk: qcom: Add msm8994 MMCC driver
dt-bindings: clock: Add support for MSM8992/4 MMCC
clk: qcom: Add Global Clock Controller driver for MSM8953
dt-bindings: clock: add Qualcomm MSM8953 GCC driver bindings
clk: qcom: gcc-sdm660: Replace usage of parent_names
clk: qcom: gcc-sdm660: Move parent tables after PLLs
clk: qcom: use devm_pm_runtime_enable and devm_pm_clk_create
PM: runtime: add devm_pm_clk_create helper
PM: runtime: add devm_pm_runtime_enable helper
clk: qcom: a53-pll: Add MSM8939 a53pll support
dt-bindings: clock: Update qcom,a53pll bindings for MSM8939 support
clk: qcom: a53pll/mux: Use unique clock name
...

* clk-socfpga:
clk: socfpga: agilex: add the bypass register for s2f_usr0 clock
clk: socfpga: agilex: fix up s2f_user0_clk representation
clk: socfpga: agilex: fix the parents of the psi_ref_clk

* clk-mediatek: (22 commits)
clk: mediatek: make COMMON_CLK_MT8167* depend on COMMON_CLK_MT8167
clk: mediatek: Add MT8192 vencsys clock support
clk: mediatek: Add MT8192 vdecsys clock support
clk: mediatek: Add MT8192 scp adsp clock support
clk: mediatek: Add MT8192 msdc clock support
clk: mediatek: Add MT8192 mmsys clock support
clk: mediatek: Add MT8192 mfgcfg clock support
clk: mediatek: Add MT8192 mdpsys clock support
clk: mediatek: Add MT8192 ipesys clock support
clk: mediatek: Add MT8192 imp i2c wrapper clock support
clk: mediatek: Add MT8192 imgsys clock support
clk: mediatek: Add MT8192 camsys clock support
clk: mediatek: Add MT8192 audio clock support
clk: mediatek: Add MT8192 basic clocks support
clk: mediatek: Add mtk_clk_simple_probe() to simplify clock providers
clk: mediatek: Add configurable enable control to mtk_pll_data
clk: mediatek: Fix asymmetrical PLL enable and disable control
clk: mediatek: Get regmap without syscon compatible check
clk: mediatek: Add dt-bindings of MT8192 clocks
dt-bindings: ARM: Mediatek: Add audsys document binding for MT8192
...

* clk-lmk:
clk: lmk04832: drop redundant fallthrough statements

* clk-x86:
clk: x86: Rename clk-lpt to more specific clk-lpss-atom

show more ...

clk: mediatek: Add MT8192 imp i2c wrapper clock support

Add MT8192 imp i2c wrapper clock provider

Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediate

clk: mediatek: Add MT8192 imp i2c wrapper clock support

Add MT8192 imp i2c wrapper clock provider

Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
Link: https://lore.kernel.org/r/20210726105719.15793-14-chun-jie.chen@mediatek.com
Reviewed-by: Ikjoon Jang <ikjn@chromium.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

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Merge branch 'linus' into smp/urgent

Ensure that all usage sites of get/put_online_cpus() except for the
struggler in drivers/thermal are gone. So the last user and the deprecated
inlines can be rem

Merge branch 'linus' into smp/urgent

Ensure that all usage sites of get/put_online_cpus() except for the
struggler in drivers/thermal are gone. So the last user and the deprecated
inlines can be removed.

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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
"Nothing changed in the clk framework core this time around. We did get
so

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
"Nothing changed in the clk framework core this time around. We did get
some updates to the basic clk types to use determine_rate for the
divider type and add a power of two fractional divider flag though.

Otherwise, this is a collection of clk driver updates. More than half
the diffstat is in the Qualcomm clk driver where we add a bunch of
data to describe clks on various SoCs and fix bugs. The other big new
thing in here is the Mediatek MT8192 clk driver. That's been under
review for a while and it's nice to see that it's finally upstream.

Beyond that it's the usual set of minor fixes and tweaks to clk
drivers. There are some non-clk driver bits in here which have all
been acked by the respective maintainers.

New Drivers:
- Support video, gpu, display clks on qcom sc7280 SoCs
- GCC clks on qcom MSM8953, SM4250/6115, and SM6350 SoCs
- Multimedia clks (MMCC) on qcom MSM8994/MSM8992
- RPMh clks on qcom SM6350 SoCs
- Support for Mediatek MT8192 SoCs
- Add display (DU and DSI) clocks on Renesas R-Car V3U
- Add I2C, DMAC, USB, sound (SSIF-2), GPIO, CANFD, and ADC clocks and
resets on Renesas RZ/G2L

Updates:
- Support the SD/OE pin on IDT VersaClock 5 and 6 clock generators
- Add power of two flag to fractional divider clk type
- Migrate some clk drivers to clk_divider_ops.determine_rate
- Migrate to clk_parent_data in gcc-sdm660
- Fix CLKOUT clocks on i.MX8MM and i.MX8MN by using imx_clk_hw_mux2
- Switch from .round_rate to .determine_rate in clk-divider-gate
- Fix clock tree update for TF-A controlled clocks for all i.MX8M
- Add missing M7 core clock for i.MX8MN
- YAML conversion of rk3399 clock controller binding
- Removal of GRF dependency for the rk3328/rk3036 pll types
- Drop CLK_IS_CRITICAL flag from Tegra fuse clk
- Make CLK_R9A06G032 Kconfig symbol invisible
- Convert various DT bindings to YAML"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (128 commits)
dt-bindings: clock: samsung: fix header path in example
clk: tegra: fix old-style declaration
clk: qcom: Add SM6350 GCC driver
MAINTAINERS: clock: include S3C and S5P in Samsung SoC clock entry
dt-bindings: clock: samsung: convert S5Pv210 AudSS to dtschema
dt-bindings: clock: samsung: convert Exynos AudSS to dtschema
dt-bindings: clock: samsung: convert Exynos4 to dtschema
dt-bindings: clock: samsung: convert Exynos3250 to dtschema
dt-bindings: clock: samsung: convert Exynos542x to dtschema
dt-bindings: clock: samsung: add bindings for Exynos external clock
dt-bindings: clock: samsung: convert Exynos5250 to dtschema
clk: vc5: Add properties for configuring SD/OE behavior
clk: vc5: Use dev_err_probe
dt-bindings: clk: vc5: Add properties for configuring the SD/OE pin
dt-bindings: clock: brcm,iproc-clocks: fix armpll properties
clk: zynqmp: Fix kernel-doc format
clk: at91: clk-generated: Limit the requested rate to our range
clk: ralink: avoid to set 'CLK_IS_CRITICAL' flag for gates
clk: zynqmp: Fix a memory leak
clk: zynqmp: Check the return type
...

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