History log of /linux/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi (Results 226 – 250 of 322)
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# 9be51f0b 08-Oct-2021 Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

ARM: dts: qcom-apq8064: add gpio-ranges to mpps nodes

Add gpio-ranges property to mpps device tree nodes, adding the mapping between
pinctrl and GPIO pins.

Signed-off-by: Dmitry Baryshkov <dmitry.b

ARM: dts: qcom-apq8064: add gpio-ranges to mpps nodes

Add gpio-ranges property to mpps device tree nodes, adding the mapping between
pinctrl and GPIO pins.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211008012524.481877-4-dmitry.baryshkov@linaro.org

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# 03d4e43f 14-Oct-2021 Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

ARM: dts: qcom-apq8064: stop using legacy clock names for HDMI

Stop using legacy clock names (with _clk suffix) for HDMI and HDMI PHY
device tree nodes.

Signed-off-by: Dmitry Baryshkov <dmitry.bary

ARM: dts: qcom-apq8064: stop using legacy clock names for HDMI

Stop using legacy clock names (with _clk suffix) for HDMI and HDMI PHY
device tree nodes.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211014214221.4173287-1-dmitry.baryshkov@linaro.org

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Revision tags: v5.15-rc4, v5.15-rc3, v5.15-rc2, v5.15-rc1
# a1c1b985 08-Sep-2021 David Heidelberg <david@ixit.cz>

ARM: dts: qcom: apq8064: adjust memory node according to specs

Signed-off-by: David Heidelberg <david@ixit.cz>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.o

ARM: dts: qcom: apq8064: adjust memory node according to specs

Signed-off-by: David Heidelberg <david@ixit.cz>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210908172544.55666-1-david@ixit.cz

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Revision tags: v5.14
# 8db0b6c7 29-Aug-2021 David Heidelberg <david@ixit.cz>

ARM: dts: qcom: apq8064: Convert adreno from legacy gpu-pwrlevels to opp-v2

APQ8064 was last user of gpu-pwrlevels inside mainline tree, so convert
it now.

Tested on Nexus 7 2013, no functional cha

ARM: dts: qcom: apq8064: Convert adreno from legacy gpu-pwrlevels to opp-v2

APQ8064 was last user of gpu-pwrlevels inside mainline tree, so convert
it now.

Tested on Nexus 7 2013, no functional changes.

Signed-off-by: David Heidelberg <david@ixit.cz>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210829133918.57780-3-david@ixit.cz

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# ecf5b34c 29-Aug-2021 David Heidelberg <david@ixit.cz>

ARM: dts: qcom: apq8064: update Adreno clock names

The legacy clock names (including the _clk suffix) was dropped from the
driver, so update the dts accordingly).

Tested on Nexus 7 2013, no functio

ARM: dts: qcom: apq8064: update Adreno clock names

The legacy clock names (including the _clk suffix) was dropped from the
driver, so update the dts accordingly).

Tested on Nexus 7 2013, no functional changes.

Signed-off-by: David Heidelberg <david@ixit.cz>
[bjorn: Updated commit message]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210829133918.57780-2-david@ixit.cz

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# f1db21c3 29-Aug-2021 Marijn Suijten <marijn.suijten@somainline.org>

ARM: dts: qcom: apq8064: Use 27MHz PXO clock as DSI PLL reference

The 28NM DSI PLL driver for msm8960 calculates with a 27MHz reference
clock and should hence use PXO, not CXO which runs at 19.2MHz.

ARM: dts: qcom: apq8064: Use 27MHz PXO clock as DSI PLL reference

The 28NM DSI PLL driver for msm8960 calculates with a 27MHz reference
clock and should hence use PXO, not CXO which runs at 19.2MHz.

Note that none of the DSI PHY/PLL drivers currently use this "ref"
clock; they all rely on (sometimes inexistant) global clock names and
usually function normally without a parent clock. This discrepancy will
be corrected in a future patch, for which this change needs to be in
place first.

Fixes: 6969d1d9c615 ("ARM: dts: qcom-apq8064: Set 'cxo_board' as ref clock of the DSI PHY")
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Link: https://lore.kernel.org/r/20210829203027.276143-2-marijn.suijten@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

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Revision tags: v5.14-rc7
# f5c03f13 18-Aug-2021 David Heidelberg <david@ixit.cz>

ARM: dts: qcom: apq8064: use compatible which contains chipid

Also resolves these kernel warnings for APQ8064:
adreno 4300000.adreno-3xx: Using legacy qcom,chipid binding!
adreno 4300000.adreno-3xx:

ARM: dts: qcom: apq8064: use compatible which contains chipid

Also resolves these kernel warnings for APQ8064:
adreno 4300000.adreno-3xx: Using legacy qcom,chipid binding!
adreno 4300000.adreno-3xx: Use compatible qcom,adreno-320.2 instead.

Tested on Nexus 7 2013, no functional changes.

Cc: <stable@vger.kernel.org>
Signed-off-by: David Heidelberg <david@ixit.cz>
Link: https://lore.kernel.org/r/20210818065317.19822-1-david@ixit.cz
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

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# 9e62ec0e 23-Aug-2021 Rob Herring <robh@kernel.org>

arm/arm64: dts: Fix remaining dtc 'unit_address_format' warnings

Fix all the remaining dtc 'unit_address_format' warnings except for the ones
related to 'register-bit-led'. For those, we need to dec

arm/arm64: dts: Fix remaining dtc 'unit_address_format' warnings

Fix all the remaining dtc 'unit_address_format' warnings except for the ones
related to 'register-bit-led'. For those, we need to decide on and document
the node name.

Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210823165126.2320910-1-robh@kernel.org'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

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Revision tags: v5.14-rc6, v5.14-rc5, v5.14-rc4, v5.14-rc3, v5.14-rc2, v5.14-rc1
# 0dc6c598 07-Jul-2021 David Heidelberg <david@ixit.cz>

ARM: dts: qcom: apq8064: correct clock names

Since new code doesn't take old clk names in account, it does fixes
error:

msm_dsi 4700000.mdss_dsi: dev_pm_opp_set_clkname: Couldn't find clock: -2

an

ARM: dts: qcom: apq8064: correct clock names

Since new code doesn't take old clk names in account, it does fixes
error:

msm_dsi 4700000.mdss_dsi: dev_pm_opp_set_clkname: Couldn't find clock: -2

and following kernel oops introduced by
b0530eb1191 ("drm/msm/dpu: Use OPP API to set clk/perf state").

Also removes warning about deprecated clock names.

Tested against linux-5.10.y LTS on Nexus 7 2013.

Reviewed-by: Brian Masney <masneyb@onstation.org>
Signed-off-by: David Heidelberg <david@ixit.cz>
Link: https://lore.kernel.org/r/20210707131453.24041-1-david@ixit.cz
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

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Revision tags: v5.13, v5.13-rc7, v5.13-rc6, v5.13-rc5, v5.13-rc4, v5.13-rc3, v5.13-rc2, v5.13-rc1, v5.12, v5.12-rc8, v5.12-rc7, v5.12-rc6, v5.12-rc5, v5.12-rc4, v5.12-rc3, v5.12-rc2, v5.12-rc1, v5.12-rc1-dontuse, v5.11, v5.11-rc7, v5.11-rc6, v5.11-rc5, v5.11-rc4, v5.11-rc3, v5.11-rc2, v5.11-rc1, v5.10, v5.10-rc7, v5.10-rc6, v5.10-rc5, v5.10-rc4, v5.10-rc3, v5.10-rc2, v5.10-rc1, v5.9, v5.9-rc8, v5.9-rc7, v5.9-rc6, v5.9-rc5, v5.9-rc4, v5.9-rc3, v5.9-rc2, v5.9-rc1, v5.8, v5.8-rc7, v5.8-rc6, v5.8-rc5, v5.8-rc4, v5.8-rc3, v5.8-rc2, v5.8-rc1, v5.7, v5.7-rc7, v5.7-rc6, v5.7-rc5, v5.7-rc4, v5.7-rc3, v5.7-rc2, v5.7-rc1, v5.6, v5.6-rc7, v5.6-rc6, v5.6-rc5, v5.6-rc4, v5.6-rc3, v5.6-rc2, v5.6-rc1, v5.5, v5.5-rc7, v5.5-rc6
# 8b99dc09 08-Jan-2020 Christian Lamparter <chunkeey@gmail.com>

ARM: dts: qcom: add gpio-ranges property

This patch adds the gpio-ranges property to almost all of
the Qualcomm ARM platforms that utilize the pinctrl-msm
framework.

The gpio-ranges property is par

ARM: dts: qcom: add gpio-ranges property

This patch adds the gpio-ranges property to almost all of
the Qualcomm ARM platforms that utilize the pinctrl-msm
framework.

The gpio-ranges property is part of the gpiolib subsystem.
As a result, the binding text is available in section
"2.1 gpio- and pin-controller interaction" of
Documentation/devicetree/bindings/gpio/gpio.txt

For more information please see the patch titled:
"pinctrl: msm: fix gpio-hog related boot issues" from
this series.

Reported-by: Sven Eckelmann <sven.eckelmann@openmesh.com>
Tested-by: Sven Eckelmann <sven.eckelmann@openmesh.com> [ipq4019]
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Tested-by: Robert Marko <robert.marko@sartura.hr> [ipq4019]
Cc: Luka Perkov <luka.perkov@sartura.hr>
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Link: https://lore.kernel.org/r/20200108125455.308969-1-robert.marko@sartura.hr
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

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Revision tags: v5.5-rc5, v5.5-rc4, v5.5-rc3, v5.5-rc2, v5.5-rc1, v5.4, v5.4-rc8, v5.4-rc7, v5.4-rc6, v5.4-rc5, v5.4-rc4, v5.4-rc3, v5.4-rc2, v5.4-rc1, v5.3, v5.3-rc8, v5.3-rc7, v5.3-rc6, v5.3-rc5, v5.3-rc4, v5.3-rc3, v5.3-rc2, v5.3-rc1, v5.2, v5.2-rc7, v5.2-rc6, v5.2-rc5, v5.2-rc4, v5.2-rc3, v5.2-rc2, v5.2-rc1
# e32d07b2 08-May-2019 Leo Yan <leo.yan@linaro.org>

ARM: dts: qcom-apq8064: Update coresight DT bindings

CoreSight DT bindings have been updated, thus the old compatible strings
are obsolete and the drivers will report warning if DTS uses these
obsol

ARM: dts: qcom-apq8064: Update coresight DT bindings

CoreSight DT bindings have been updated, thus the old compatible strings
are obsolete and the drivers will report warning if DTS uses these
obsolete strings.

This patch switches to the new bindings for CoreSight dynamic funnel and
static replicator, so can dismiss warning during initialisation.

Cc: Andy Gross <agross@kernel.org>
Cc: David Brown <david.brown@linaro.org>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Andy Gross <agross@kernel.org>

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Revision tags: v5.1, v5.1-rc7, v5.1-rc6, v5.1-rc5, v5.1-rc4, v5.1-rc3, v5.1-rc2, v5.1-rc1, v5.0, v5.0-rc8, v5.0-rc7, v5.0-rc6, v5.0-rc5, v5.0-rc4, v5.0-rc3, v5.0-rc2, v5.0-rc1, v4.20
# 6969d1d9 19-Dec-2018 Matthias Kaehlcke <mka@chromium.org>

ARM: dts: qcom-apq8064: Set 'cxo_board' as ref clock of the DSI PHY

Add 'xo_board' as ref clock for the DSI PHY, it was previously
hardcoded in the PLL 'driver' for the 28nm 8960 PHY.

Signed-off-by

ARM: dts: qcom-apq8064: Set 'cxo_board' as ref clock of the DSI PHY

Add 'xo_board' as ref clock for the DSI PHY, it was previously
hardcoded in the PLL 'driver' for the 28nm 8960 PHY.

Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Andy Gross <agross@kernel.org>

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# 33984dd6 06-Mar-2019 Brian Masney <masneyb@onstation.org>

ARM: dts: qcom: apq8064: add gpio-ranges

This adds the gpio-ranges property so that the GPIO pins are initialized
by the GPIO framework and not pinctrl. This fixes a circular dependency
between thes

ARM: dts: qcom: apq8064: add gpio-ranges

This adds the gpio-ranges property so that the GPIO pins are initialized
by the GPIO framework and not pinctrl. This fixes a circular dependency
between these two frameworks so GPIO hogging can be used on this board.

This was not tested on this particular hardware, however this same
change was tested on qcom-pm8941 using a LG Nexus 5 (hammerhead) phone.

Signed-off-by: Brian Masney <masneyb@onstation.org>
Signed-off-by: Andy Gross <agross@kernel.org>

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# 3601fe43 08-Mar-2019 Linus Torvalds <torvalds@linux-foundation.org>

Merge tag 'gpio-v5.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio

Pull GPIO updates from Linus Walleij:
"This is the bulk of GPIO changes for the v5.1 cycle:

Core change

Merge tag 'gpio-v5.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio

Pull GPIO updates from Linus Walleij:
"This is the bulk of GPIO changes for the v5.1 cycle:

Core changes:

- The big change this time around is the irqchip handling in the
qualcomm pin controllers, closely coupled with the gpiochip. This
rework, in a classic fall-between-the-chairs fashion has been
sidestepped for too long.

The Qualcomm IRQchips using the SPMI and SSBI transport mechanisms
have been rewritten to use hierarchical irqchip. This creates the
base from which I intend to gradually pull support for hierarchical
irqchips into the gpiolib irqchip helpers to cut down on duplicate
code.

We have too many hacks in the kernel because people have been
working around the missing hierarchical irqchip for years, and once
it was there, noone understood it for a while. We are now slowly
adapting to using it.

This is why this pull requests include changes to MFD, SPMI,
IRQchip core and some ARM Device Trees pertaining to the Qualcomm
chip family. Since Qualcomm have so many chips and such large
deployments it is paramount that this platform gets this right, and
now it (hopefully) does.

- Core support for pull-up and pull-down configuration, also from the
device tree. When a simple GPIO chip supports an "off or on" pull-up
or pull-down resistor, we provide a way to set this up using
machine descriptors or device tree.

If more elaborate control of pull up/down (such as resistance shunt
setting) is required, drivers should be phased over to use pin
control. We do not yet provide a userspace ABI for this pull
up-down setting but I suspect the makers are going to ask for it
soon enough. PCA953x is the first user of this new API.

- The GPIO mockup driver has been revamped after some discussion
improving the IRQ simulator in the process.

The idea is to make it possible to use the mockup for both testing
and virtual prototyping, e.g. when you do not yet have a GPIO
expander to play with but really want to get something to develop
code around before hardware is available. It's neat. The blackbox
testing usecase is currently making its way into kernelci.

- ACPI GPIO core preserves non direction flags when updating flags.

- A new device core helper for devm_platform_ioremap_resource() is
funneled through the GPIO tree with Greg's ACK.

New drivers:

- TQ-Systems QTMX86 GPIO controllers (using port-mapped I/O)

- Gateworks PLD GPIO driver (vaccumed up from OpenWrt)

- AMD G-Series PCH (Platform Controller Hub) GPIO driver.

- Fintek F81804 & F81966 subvariants.

- PCA953x now supports NXP PCAL6416.

Driver improvements:

- IRQ support on the Nintendo Wii (Hollywood) GPIO.

- get_direction() support for the MVEBU driver.

- Set the right output level on SAMA5D2.

- Drop the unused irq trigger setting on the Spreadtrum driver.

- Wakeup support for PCA953x.

- A slew of cleanups in the various Intel drivers"

* tag 'gpio-v5.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (110 commits)
gpio: gpio-omap: fix level interrupt idling
gpio: amd-fch: Set proper output level for direction_output
x86: apuv2: remove unused variable
gpio: pca953x: Use PCA_LATCH_INT
platform/x86: fix PCENGINES_APU2 Kconfig warning
gpio: pca953x: Fix dereference of irq data in shutdown
gpio: amd-fch: Fix type error found by sparse
gpio: amd-fch: Drop const from resource
gpio: mxc: add check to return defer probe if clock tree NOT ready
gpio: ftgpio: Register per-instance irqchip
gpio: ixp4xx: Add DT bindings
x86: pcengines apuv2 gpio/leds/keys platform driver
gpio: AMD G-Series PCH gpio driver
drivers: depend on HAS_IOMEM for devm_platform_ioremap_resource()
gpio: tqmx86: Set proper output level for direction_output
gpio: sprd: Change to use SoC compatible string
gpio: sprd: Use SoC compatible string instead of wildcard string
gpio: of: Handle both enable-gpio{,s}
gpio: of: Restrict enable-gpio quirk to regulator-gpio
gpio: davinci: use devm_platform_ioremap_resource()
...

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# e2f6c888 08-Feb-2019 Brian Masney <masneyb@onstation.org>

arm: dts: qcom: apq8064: add interrupt controller properties

Add interrupt controller properties now that ssbi-gpio is a proper
hierarchical IRQ chip. The interrupts property is no longer needed so

arm: dts: qcom: apq8064: add interrupt controller properties

Add interrupt controller properties now that ssbi-gpio is a proper
hierarchical IRQ chip. The interrupts property is no longer needed so
remove it.

This change was not tested on any hardware but the same change was
tested on an APQ8060 DragonBoard with no issues.

Signed-off-by: Brian Masney <masneyb@onstation.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

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# abe60a3a 09-Jan-2019 Rob Herring <robh@kernel.org>

ARM: dts: Kill off skeleton{64}.dtsi

Remove the usage of skeleton.dtsi in the remaining dts files. It was
deprecated since commit 9c0da3cc61f1 ("ARM: dts: explicitly mark
skeleton.dtsi as deprecated

ARM: dts: Kill off skeleton{64}.dtsi

Remove the usage of skeleton.dtsi in the remaining dts files. It was
deprecated since commit 9c0da3cc61f1 ("ARM: dts: explicitly mark
skeleton.dtsi as deprecated"). This will make adding a unit-address to
memory nodes easier.

The main tricky part to removing skeleton.dtsi is we could end up with
no /memory node at all when a bootloader depends on one being present. I
hacked up dtc to check for this condition.

Acked-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Antoine Tenart <antoine.tenart@bootlin.com>
Acked-by: Alexandre TORGUE <alexandre.torgue@st.com>
Acked-by: Robert Jarzmik <robert.jarzmik@free.fr>
Acked-by: Vladimir Zapolskiy <vz@mleia.com>
Tested-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Tested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Tested-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

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Revision tags: v4.20-rc7, v4.20-rc6, v4.20-rc5, v4.20-rc4, v4.20-rc3, v4.20-rc2, v4.20-rc1, v4.19, v4.19-rc8, v4.19-rc7, v4.19-rc6, v4.19-rc5, v4.19-rc4
# ca02f96b 12-Sep-2018 Suzuki K Poulose <suzuki.poulose@arm.com>

ARM: dts: qcom: Update coresight bindings for hardware ports

Switch to the new hardware port bindings for coresight

Cc: Andy Gross <andy.gross@linaro.org>
Cc: David Brown <david.brown@linaro.org>
C

ARM: dts: qcom: Update coresight bindings for hardware ports

Switch to the new hardware port bindings for coresight

Cc: Andy Gross <andy.gross@linaro.org>
Cc: David Brown <david.brown@linaro.org>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Andy Gross <andy.gross@linaro.org>

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Revision tags: v4.19-rc3, v4.19-rc2, v4.19-rc1, v4.18, v4.18-rc8, v4.18-rc7, v4.18-rc6, v4.18-rc5, v4.18-rc4, v4.18-rc3, v4.18-rc2, v4.18-rc1, v4.17, v4.17-rc7, v4.17-rc6, v4.17-rc5
# 90ce6265 09-May-2018 Niklas Cassel <niklas.cassel@linaro.org>

ARM: dts: qcom-apq8064: use correct pci address for address translation

For PCI, the second and third cell in ranges specifies the upper and
lower target address for address translation. This target

ARM: dts: qcom-apq8064: use correct pci address for address translation

For PCI, the second and third cell in ranges specifies the upper and
lower target address for address translation. This target address will
be used to program the internal address translation unit (iATU).

The current device tree configuration will program the iATU to translate
CPU accesses to 0x08000000 to PCI address 0x0 (with TLP type MEM).
The device tree configuration also specifies that CPU acesses to
0x0fe00000 will be translated to PCI address 0x0 (with TLP type I/O).

We cannot have both I/O space and memory space at PCI address 0x0.

The PCI code already uses the CPU address when assigning addresses to
memory BARs, so for memory space the PCI address should be the same as
the CPU address. This also matches how all other device trees using
snps,dw-pcie are configured.

The existing configuration appears to work, even if it is incorrect.
For some reason the iATU doesn't obey the existing configuration,
and doesn't translate CPU accesses from 0x08000000 to PCI address 0x0.

The reason why the existing configuration works at all is probably
because the default behavior, when there is no match, is to use the
untranslated address. This happens to work for memory space, since
it's a 1:1 mapping. However, instead of relying on this behavior,
let's configure the iATU correctly.

Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>

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Revision tags: v4.17-rc4, v4.17-rc3, v4.17-rc2
# 5dba0480 20-Apr-2018 Thierry Escande <thierry.escande@linaro.org>

ARM: dts: qcom-apq8064: fix gic_irq_domain_translate warnings

Remove the usage of IRQ_TYPE_NONE to fix loud warnings from
patch (83a86fbb5b56b "irqchip/gic: Loudly complain about
the use of IRQ_TYPE

ARM: dts: qcom-apq8064: fix gic_irq_domain_translate warnings

Remove the usage of IRQ_TYPE_NONE to fix loud warnings from
patch (83a86fbb5b56b "irqchip/gic: Loudly complain about
the use of IRQ_TYPE_NONE").

Signed-off-by: Thierry Escande <thierry.escande@linaro.org>
Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org>
Tested-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>

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Revision tags: v4.17-rc1, v4.16, v4.16-rc7, v4.16-rc6
# 76a40765 15-Mar-2018 Srinivas Kandagatla <srinivas.kandagatla@linaro.org>

ARM: dts: qcom-apq8064: disable i2c by default at soc dtsi

This patch marks all the gsbi i2c node at soc level dtsi, so that kernel
would not assume that its enabled and result in pin conflicts when

ARM: dts: qcom-apq8064: disable i2c by default at soc dtsi

This patch marks all the gsbi i2c node at soc level dtsi, so that kernel
would not assume that its enabled and result in pin conflicts when gsbi
is used for UART or SPI.

Without this patch we see below pin conflict.

apq8064-pinctrl 800000.pinctrl: pin GPIO_20 already requested by
12450000.serial; cannot claim for 12460000.i2c
apq8064-pinctrl 800000.pinctrl: pin-20 (12460000.i2c) status -22
apq8064-pinctrl 800000.pinctrl: could not request pin 20 (GPIO_20)
from group gpio20 on device 800000.pinctrl
i2c_qup 12460000.i2c: Error applying setting, reverse things back
i2c_qup: probe of 12460000.i2c failed with error -22

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>

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Revision tags: v4.16-rc5, v4.16-rc4
# c4b70883 28-Feb-2018 Linus Walleij <linus.walleij@linaro.org>

ARM: dts: add XOADC and IIO HWMON to APQ8064

This adds the PM8921 XOADC node to the PM8921 PMIC node,
defines the channels and further also define an IIO HWMON
node for the channels that are used fo

ARM: dts: add XOADC and IIO HWMON to APQ8064

This adds the PM8921 XOADC node to the PM8921 PMIC node,
defines the channels and further also define an IIO HWMON
node for the channels that are used for housekeeping of
voltages and die temperature for the PMIC chip die.

Tested on the Nexus 7 tablet:
lsiio
Device 000: PM8921-XOADC
cd /sys/bus/iio/devices/iio:device0
cat in_voltage10_input
616461 (0.625V reference voltage)
cat in_voltage11_input
(1.25V reference voltage)
cat temp1_input
35852 (die temperature)

Cc: John Stultz <john.stultz@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>

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Revision tags: v4.16-rc3, v4.16-rc2, v4.16-rc1, v4.15, v4.15-rc9, v4.15-rc8, v4.15-rc7, v4.15-rc6, v4.15-rc5, v4.15-rc4, v4.15-rc3, v4.15-rc2, v4.15-rc1
# 527d1470 16-Nov-2017 Linus Torvalds <torvalds@linux-foundation.org>

Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM device-tree updates from Arnd Bergmann:
"We add device tree files for a couple of additional SoCs in vari

Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM device-tree updates from Arnd Bergmann:
"We add device tree files for a couple of additional SoCs in various
areas:

Allwinner R40/V40 for entertainment, Broadcom Hurricane 2 for
networking, Amlogic A113D for audio, and Renesas R-Car V3M for
automotive.

As usual, lots of new boards get added based on those and other SoCs:

- Actions S500 based CubieBoard6 single-board computer

- Amlogic Meson-AXG A113D based development board
- Amlogic S912 based Khadas VIM2 single-board computer
- Amlogic S912 based Tronsmart Vega S96 set-top-box

- Allwinner H5 based NanoPi NEO Plus2 single-board computer
- Allwinner R40 based Banana Pi M2 Ultra and Berry single-board computers
- Allwinner A83T based TBS A711 Tablet

- Broadcom Hurricane 2 based Ubiquiti UniFi Switch 8
- Broadcom bcm47xx based Luxul XAP-1440/XAP-810/ABR-4500/XBR-4500
wireless access points and routers

- NXP i.MX51 based Zodiac Inflight Innovations RDU1 board
- NXP i.MX53 based GE Healthcare PPD biometric monitor
- NXP i.MX6 based Pistachio single-board computer
- NXP i.MX6 based Vining-2000 automotive diagnostic interface
- NXP i.MX6 based Ka-Ro TX6 Computer-on-Module in additional variants

- Qualcomm MSM8974 (Snapdragon 800) based Fairphone 2 phone
- Qualcomm MSM8974pro (Snapdragon 801) based Sony Xperia Z2 Tablet

- Realtek RTD1295 based set-top-boxes MeLE V9 and PROBOX2 AVA

- Renesas R-Car V3M (R8A77970) SoC and "Eagle" reference board
- Renesas H3ULCB and M3ULCB "Kingfisher" extension infotainment boards
- Renasas r8a7745 based iWave G22D-SODIMM SoM

- Rockchip rk3288 based Amarula Vyasa single-board computer

- Samsung Exynos5800 based Odroid HC1 single-board computer

For existing SoC support, there was a lot of ongoing work, as usual
most of that concentrated on the Renesas, Rockchip, OMAP, i.MX,
Amlogic and Allwinner platforms, but others were also active.

Rob Herring and many others worked on reducing the number of issues
that the latest version of 'dtc' now warns about. Unfortunately there
is still a lot left to do.

A rework of the ARM foundation model introduced several new files for
common variations of the model"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (599 commits)
arm64: dts: uniphier: route on-board device IRQ to GPIO controller for PXs3
dt-bindings: bus: Add documentation for the Technologic Systems NBUS
arm64: dts: actions: s900-bubblegum-96: Add fake uart5 clock
ARM: dts: owl-s500: Add CubieBoard6
dt-bindings: arm: actions: Add CubieBoard6
ARM: dts: owl-s500-guitar-bb-rev-b: Add fake uart3 clock
ARM: dts: owl-s500: Set power domains for CPU2 and CPU3
arm: dts: mt7623: remove unused compatible string for pio node
arm: dts: mt7623: update usb related nodes
arm: dts: mt7623: update crypto node
ARM: dts: sun8i: a711: Enable USB OTG
ARM: dts: sun8i: a711: Add regulator support
ARM: dts: sun8i: a83t: bananapi-m3: Enable AP6212 WiFi on mmc1
ARM: dts: sun8i: a83t: cubietruck-plus: Enable AP6330 WiFi on mmc1
ARM: dts: sun8i: a83t: Move mmc1 pinctrl setting to dtsi file
ARM: dts: sun8i: a83t: allwinner-h8homlet-v2: Add AXP818 regulator nodes
ARM: dts: sun8i: a83t: bananapi-m3: Add AXP813 regulator nodes
ARM: dts: sun8i: a83t: cubietruck-plus: Add AXP818 regulator nodes
ARM: dts: sunxi: Add dtsi for AXP81x PMIC
arm64: dts: allwinner: H5: Restore EMAC changes
...

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Revision tags: v4.14, v4.14-rc8
# b2441318 01-Nov-2017 Greg Kroah-Hartman <gregkh@linuxfoundation.org>

License cleanup: add SPDX GPL-2.0 license identifier to files with no license

Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine

License cleanup: add SPDX GPL-2.0 license identifier to files with no license

Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.

By default all files without license information are under the default
license of the kernel, which is GPL version 2.

Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier. The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.

This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.

How this work was done:

Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
- file had no licensing information it it.
- file was a */uapi/* one with no licensing information in it,
- file was a */uapi/* one with existing licensing information,

Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.

The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne. Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.

The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed. Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.

Criteria used to select files for SPDX license identifier tagging was:
- Files considered eligible had to be source code files.
- Make and config files were included as candidates if they contained >5
lines of source
- File already had some variant of a license header in it (even if <5
lines).

All documentation files were explicitly excluded.

The following heuristics were used to determine which SPDX license
identifiers to apply.

- when both scanners couldn't find any license traces, file was
considered to have no license information in it, and the top level
COPYING file license applied.

For non */uapi/* files that summary was:

SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 11139

and resulted in the first patch in this series.

If that file was a */uapi/* path one, it was "GPL-2.0 WITH
Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was:

SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 WITH Linux-syscall-note 930

and resulted in the second patch in this series.

- if a file had some form of licensing information in it, and was one
of the */uapi/* ones, it was denoted with the Linux-syscall-note if
any GPL family license was found in the file or had no licensing in
it (per prior point). Results summary:

SPDX license identifier # files
---------------------------------------------------|------
GPL-2.0 WITH Linux-syscall-note 270
GPL-2.0+ WITH Linux-syscall-note 169
((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21
((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17
LGPL-2.1+ WITH Linux-syscall-note 15
GPL-1.0+ WITH Linux-syscall-note 14
((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5
LGPL-2.0+ WITH Linux-syscall-note 4
LGPL-2.1 WITH Linux-syscall-note 3
((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3
((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1

and that resulted in the third patch in this series.

- when the two scanners agreed on the detected license(s), that became
the concluded license(s).

- when there was disagreement between the two scanners (one detected a
license but the other didn't, or they both detected different
licenses) a manual inspection of the file occurred.

- In most cases a manual inspection of the information in the file
resulted in a clear resolution of the license that should apply (and
which scanner probably needed to revisit its heuristics).

- When it was not immediately clear, the license identifier was
confirmed with lawyers working with the Linux Foundation.

- If there was any question as to the appropriate license identifier,
the file was flagged for further research and to be revisited later
in time.

In total, over 70 hours of logged manual review was done on the
spreadsheet to determine the SPDX license identifiers to apply to the
source files by Kate, Philippe, Thomas and, in some cases, confirmation
by lawyers working with the Linux Foundation.

Kate also obtained a third independent scan of the 4.13 code base from
FOSSology, and compared selected files where the other two scanners
disagreed against that SPDX file, to see if there was new insights. The
Windriver scanner is based on an older version of FOSSology in part, so
they are related.

Thomas did random spot checks in about 500 files from the spreadsheets
for the uapi headers and agreed with SPDX license identifier in the
files he inspected. For the non-uapi files Thomas did random spot checks
in about 15000 files.

In initial set of patches against 4.14-rc6, 3 files were found to have
copy/paste license identifier errors, and have been fixed to reflect the
correct identifier.

Additionally Philippe spent 10 hours this week doing a detailed manual
inspection and review of the 12,461 patched files from the initial patch
version early this week with:
- a full scancode scan run, collecting the matched texts, detected
license ids and scores
- reviewing anything where there was a license detected (about 500+
files) to ensure that the applied SPDX license was correct
- reviewing anything where there was no detection but the patch license
was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied
SPDX license was correct

This produced a worksheet with 20 files needing minor correction. This
worksheet was then exported into 3 different .csv files for the
different types of files to be modified.

These .csv files were then reviewed by Greg. Thomas wrote a script to
parse the csv files and add the proper SPDX tag to the file, in the
format that the file expected. This script was further refined by Greg
based on the output to detect more types of files automatically and to
distinguish between header and source .c files (which need different
comment types.) Finally Greg ran the script using the .csv files to
generate the patches.

Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

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Revision tags: v4.14-rc7, v4.14-rc6, v4.14-rc5, v4.14-rc4, v4.14-rc3, v4.14-rc2
# fb83f201 18-Sep-2017 Srinivas Kandagatla <srinivas.kandagatla@linaro.org>

ARM: dts: qcom-apq8064: disable gsbi6 i2c by default at soc dtsi

This patch marks gsbi i2c node at soc level dtsi, so that kernel
would not assume that its enabled and result in pin conflicts on
som

ARM: dts: qcom-apq8064: disable gsbi6 i2c by default at soc dtsi

This patch marks gsbi i2c node at soc level dtsi, so that kernel
would not assume that its enabled and result in pin conflicts on
some boards like IFC6410 which do use these pins for uart.

Without this patch we see below pin conflict:
apq8064-pinctrl 800000.pinctrl: pin GPIO_16 already requested by
16540000.serial; cannot claim for 16580000.i2c
apq8064-pinctrl 800000.pinctrl: pin-16 (16580000.i2c) status -22
apq8064-pinctrl 800000.pinctrl: could not request pin 16 (GPIO_16)
from group gpio16 on device 800000.pinctrl
i2c_qup 16580000.i2c: Error applying setting, reverse things back
i2c_qup: probe of 16580000.i2c failed with error -22

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>

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Revision tags: v4.14-rc1, v4.13, v4.13-rc7, v4.13-rc6
# 3191b5b3 16-Aug-2017 Andy Gross <andy.gross@linaro.org>

ARM: dts: qcom-apq8064: Fix dsi and hdmi phy cells

This patch adds the necessary #phy-cells property to the DSI and HDMI
phys.

Signed-off-by: Andy Gross <andy.gross@linaro.org>
Reviewed-by: Archit

ARM: dts: qcom-apq8064: Fix dsi and hdmi phy cells

This patch adds the necessary #phy-cells property to the DSI and HDMI
phys.

Signed-off-by: Andy Gross <andy.gross@linaro.org>
Reviewed-by: Archit Taneja <architt@codeaurora.org>

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